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Accutek Microcircuit Corporation
DESCRIPTION
The Accutek AK594096A high density memory module is a CMOS random access memory organized in 4 Meg x 9 bit words. The assembly consists of nine standard 4 Meg x 1 DRAMs in plastic leaded chip carriers (SOJ) mounted on the front side of a printed circuit board. The module can be configured as a leadless 30 pad SIM or a leaded 30 pin SIP. The module is only 0.800 inches high (same height as a standard 1 Meg module), making it ideally suited for applications with low height restrictions. The operation of the AK594096A is identical to nine 4 Meg x 1 DRAMs. For the lower eight bits data input is tied to the data output and brought out separately for each device, with common RAS, CAS control. This common I/O feature dictates the use of early-write cycles to prevent contention of D and Q. Since the Write-Enable (WE) signal must always go low before CAS in a write cycle, Read-Write and Read-Modify-Write operation is not possible. For the ninth bit, the data input (D9) and the data output (Q9) pins are brought out separately and controlled by a separate PCAS for that bit. Bit nine is generally used for parity.
AK594096AS / AK594096AG 4,194,304 Word x 9 Bit CMOS Dynamic Random Access Memory
Front View 30-Pin SIM
1
30
30-Pin SIP
1
FEATURES
* 4,194,304 x 9 bit organization * Optional 30 Pad leadless SIM (Single In-Line Module) or 30 Pin leaded SIP (Single In-Line Package) * JEDEC standard pinout * Common CAS and RAS control for the lower eight bits * Separate PCAS for control for D9 and Q9 * CAS-before-RAS refresh * Power 4.45 Watt Max Active (80 nSEC) 3.96 Watt Max Active (100 nSEC) 49.5 mW Max Standby * Operating free air temperature 00C to 700C * Upward compatible with AK5916384 * Downward compatible with AK591024, AK59256
PIN NOMENCLATURE
DQ1 - DQ8 D9 Q9 A0 - A10 CAS, PCAS RAS WE Vcc Vss NC Data In / Data Out Data In 9 Data Out 9 Address Inputs Column Address Strobe Row Address Strobe Write Enable 5v Supply Ground No Connect
PIN ASSIGNMENT
PIN # SYMBOL PIN # SYMBOL
FUNCTIONAL DIAGRAM
DQ5 A8 A9 A10 DQ6 WE Vss DQ7 NC DQ8 Q9 RAS PCAS D9 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Vcc CAS DQ1 A0 A1 DQ2 A2 A3 Vss DQ3 A4 A5 DQ4 A6 A7
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
MODULE OPTIONS
Leadless SIM: AK594096AS Leaded SIP: AK594096AG
15
ORDERING INFORMATION PART NUMBER CODING INTERPRETATION
Position 1 2 Product AK = Accutek Memory Type 4 = Dynamic RAM 5 = CMOS Dynamic RAM 6 = Static RAM Organization/Word Width 1 = by 1 16 = by 16 4 = by 4 32 = by 32 8 = by 8 36 = by 36 9 = by 9 Size/Bits Depth 64 = 64K 4096 = 4 MEG 256 = 256K 8192 = 8 MEG 1024 = 1 MEG 16384 = 16 MEG Package Type G = Single In-Line Package (SIP) S = Single In-Line Module (SIM) D = Dual In-Line Package (DIP) W = .050 inch Pitch Edge Connect Z = Zig-Zag In-Line Package (ZIP) Special Designation P = Page Mode N = Nibble Mode K = Static Column Mode W = Write Per Bit Mode V = Video Ram Separator - = Commercial 00C to +700C M = Military Equivalent Screened (-550C to +1250C) I = Industrial Temperature Tested (-450C to +850C) X = Burned In Speed (first two significant digits) DRAMS SRAMS 50 = 50 nS 8= 8 nS 60 = 60 nS 10 = 10 nS 70 = 70 nS 12 = 12 nS 80 = 80 nS 15 = 15 nS
1 2 3 4 5 6 7 8
MECHANICAL DIMENSIONS
Inches
3
0.815 0.785
4
0.425 0.375
.100 .060
0.100 TYP
0.815 0.785
0.325 0.275
5
1
1
0.100 TYP
6
3.100 3.090
3.525 3.475
7
0.024 0.016
30
0.053 0.047
0.200 MAX
8
0.100 TYP
The numbers and coding on this page do not include all variations available but are show as examples of the most widely used variations. Contact Accutek if other information is required.
EXAMPLES:
AK594096ASP-80 4 Meg x 9, 80 nSEC DRAM 30 pin SIM Configuration, Page Mode AK594096AGP-70 4 Meg x 9, 70 nSEC Dram 30 pin SIP Configuration, Page Mode ACCUTEK MICROCIRCUIT CORPORATION BUSINESS CENTER at NEWBURYPORT 2 NEW PASTURE ROAD, SUITE 1 NEWBURYPORT, MA 01950-4054 VOICE: 978-465-6200 FAX: 978-462-3396 Email: sales@accutekmicro.com Internet: www.accutekmicro.com Accutek reserves the right to make changes in specifications at any time and without notice. Accutek does not assume any responsibility for the use of any circuitry described; no circuit patent licenses are implied. Preliminary data sheets contain minimum and maximum limits based upon design objectives, which are subject to change upon full characterization over the specific operating conditions.

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